Core Platform – DDR Engineer
COMPANY OVERVIEW:
MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defense, Consumer Electronics, Automotive, Medical and Networking & Telecommunications.
REQUIRED SKILLS:
• The charter of the Core BSP-DDR SW System team is to ensure that the end-product qualifies the defined acceptance criteria for DDR by meeting stability, Power and Performance Goals.
• Strong understating of system level test methodologies and run validations on mobile systems.
• The position involves Understanding of SOC Architecture and DDR SW Systems, identifying, and debugging DDR systems issues (memory corruptions, Memory Lockups, Bit flips, memory
• leaks etc..) reported by memory validation and running system level validations tests.
• The engineer would have opportunity to interact with different SW & HW teams to understand DDR systems.
• Good analytical / problem solving / sound reasoning skills
• Good understanding SOC systems knowledge level tests validation methodologies.
• Good understanding in working android environment. Experience of core BSP driver level development and debug
• Good understating of working debug tools like JTAG/TRACE. Awareness of RTOS operating system fundamentals / processor architecture /embedded system and microprocessor concepts.
• Understanding of DRAM technologies (LPDDR&PCDDR) and working on DRAM interface signal analysis is big plus
• The candidate is expected to be self-driven to quickly get up to speed on various aspects of DDR validation & flexible to take-up tasks as per the project needs
Education Requirements B. Tech / M. Tech (ECE)
Experience 3 to 7 Years
Location Hyderabad & Bangalore
Shift General
Work Week Monday to Friday
Quick Links:
Who we are? https://www.youtube.com/watch?v=4nvbzE-eUGk
How we train? https://www.youtube.com/watch?v=Yy5GtKP7ozk
Contact: Recruit@moschip.com
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